Xilinx U200/U250 Alveo Data Center accelerator card

 Alveo U200 and U250 Product Details

 

Manufacturer Part Number	Description	Memory Size	Bandwidth	LUTs	INT8 TOPs
A-U200-A64G-PQ-G	BOARD DCAB SERVER U200 ACTIVE	64GB	77GB/s	892K	18.6
A-U200-P64G-PQ-G	BOARD DCAB SERVER U200 PASSIVE	64GB	77GB/s	892K	18.6
A-U250-P64G-PQ-G	BOARD DCAB SERVER U250 PASSIVE	64GB	77GB/s	1341K	33.3
A-U250-A64G-PQ-G	BOARD DCAB SERVER U250 ACTIVE	64GB	77GB/s	1341K	33.3

 

Card Specifications

Dimensions

The card is compliant with the PCIe CEM rev.3.0 specification  as a dual-slot, standard height card. The card with

the passive cooling enclosure is three-quarter length, and the card with the active cooling enclosure is full length

Network Interfaces

Both Alveo U200 and U250 accelerator cards host two 100G interfaces, each comprised of a 4-lane QSFP28

connector, which accepts up to 5W modules. QSFP connectors are not supported in the current version of the

deployment shell. Each connector is housed within a single QSFP cage assembly.

USB Maintenance Port

The Alveo U200 and U250 accelerator cards include a covered micro-USB maintenance port at the I/O bracket.

FPGA Resource Information

At the heart of the Xilinx Alveo U200 and U250 accelerator cards are custom-built UltraScale+ FPGAs that run

optimally (and exclusively) on Alveo. The Alveo U200 card features the XCU200 FPGA and the Alveo U250 card

features the XCU250 FPGA. Both XCU200 and XCU250 FPGAs use Xilinx stacked silicon interconnect (SSI)

technology to deliver breakthrough FPGA capacity, bandwidth, and power efficiency. This technology allows for

increased density by combining m†ѴঞrѴ; super logic regions (SLRs). The XCU200 comprises three SLRs and the

XCU250 comprises four SLRs.

The deployment shell that handles device bring-up and configuration over PCIe is contained within the static

region of the FPGA. The remaining dynamic region is available for application developers to implement custom

accelerators

 

U200/U250 Product Brief

 

Product Selection Guide